Barua, Rajeev
Maryland Energy Innovation Institute
Dr. Rajeev Barua is a Professor of Electrical and Computer Engineering at the University of Maryland. He received his Ph.D in Computer Science and Electrical Engineering from the Massachusetts Institute of Technology in 2000.
Dr. Barua is a recipient of the NSF CAREER award in 2002, the UMD George Corcoran Award for teaching excellence in 2003, and the UMD Jimmy Lin Award for innovation in 2014. He was a finalist for the “Inventor of the Year” Award in 2005 given by the Office of Technology Commercialization at the University of Maryland. He has published over 60 academic papers and five issued patents. He has raised $6.95M in research grants and contracts at UMD, with his portion being $4.35M.
Dr. Barua is also the Founder and CEO of SecondWrite Inc., which commercializes binary rewriting technology his research group developed at the university. His company, SecondWrite, has raised over $2.4M in funding, including $1.3M in US governments SBIR grants, and the rest from professional private investors. SecondWrite has several paying customers for its cybersecurity software.
Dr. Barua’s work on the Raw Architecture at MIT led to a chip fabricated by IBM corporation. His work on the Raw compiler has been incorporated by Tilera Corporation. He received the President of India Gold Medal for graduating from the Indian Institute of Technology in 1992 with the highest GPA in the university that year. In 2013, his 1999 paper on "Parallelizing Applications into Silicon" was selected among the most significant 25 papers in the first 20 years of the International IEEE Symposium on Field-Programmable Custom Computing Machines.
Dr. Barua's research interests are in the areas of program analysis, cybersecurity, and applied AI. Recent work has tackled the problems of cyber-attack detection, malware understanding, binary rewriting for security enhancement, real-time improvement, and lowering energy use. Earlier work has targeted compiler approaches to reliable software in embedded systems, memory allocation for embedded systems, and compiling for multiprocessor and tiled architectures.