Credits: 3

Description

Prerequisite: Minimum grade of C- in ENEE244; and 1 course with a minimum grade of C- from (ENEE150, CMSC132); and permission of ENGR-Electrical & Computer Engineering department.
Restriction: Must be in one of the following programs (Engineering: Computer; Engineering: Electrical).
Structure and organization of digital computers. Registers, memory, control and I/O. Data and instruction formats, addressing modes, assembly language programming. Elements of system software, subroutines and their linkages.

Semesters Offered

Fall 2017, Spring 2018, Summer 2018, Fall 2018, Spring 2019, Summer 2019, Fall 2019, Spring 2020, Fall 2020, Spring 2021, Summer 2021, Fall 2021, Spring 2022, Summer 2022, Fall 2022, Spring 2023, Summer 2023, Fall 2023, Spring 2024, Summer 2024, Fall 2024, Spring 2025

Learning Objectives

  • Develop a deep understanding of the formats in which computers take instructions
  • Develop a conceptual understanding of how to estimate the CPU performance and what are the underlying parameters
  • Develop an understanding of what are the significant modules and components in modern CPUs and how are they interconnected
  • Develop mechanisms for improving the CPU performance using pipelining, and also techniques for addressing the associated hazards
  • Techniques for improving the CPU memory interface using cache memory
  • Ability to design a basic CPU that supports a given set of instructions and also engineering methods for improving its performance

Topics Covered

  • Instruction Set Architecture
  • Computer Arithmetic
  • Processor Datapath and Control
  • Pipelining
  • Cache
  • Virtual Memory